At a Glance
- Tasks: Design and verify custom standard cells using cutting-edge analog design tools.
- Company: Join TekWissen Group, a leader in workforce management with global reach.
- Benefits: Competitive pay at $57/hr and opportunities for professional growth.
- Other info: Dynamic team environment with a focus on diversity and inclusion.
- Why this job: Work on innovative projects that shape the future of technology.
- Qualifications: Strong knowledge of CMOS circuits and experience with EDA tools required.
The predicted salary is between 57 - 57 $ per hour.
Duration: 12 Months
Location: Markham ON L3T 7X6
Job Type: Temporary Assignment
Work Type: Onsite
Pay Rate: $57.00 - $57.00/Hr
Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world.
Description:
THE DEPARTMENT: Our department is responsible for developing Standard Cell Libraries, supporting 3rd party Standard Cell Libraries for all client products, and in-house Process Characterization structures. These IPs must meet client’s performance, power, area, and cost requirements in state-of-the-art CMOS technologies. We are exposed to bleeding-edge technologies that few other companies will ever hear of. We play a major role in shaping client’s roadmap and future products.
THE ROLE: This role is geared towards developing required stdcell library EDA (Electronic Design Automation) views, importing 3rd Party EDA views and qualifying them to work with the tools defined in client’s Synthesis and Place and Route flows. The role also drives local design innovation and improvement of critical standard cells that are contributing the most to best power/performance per area.
KEY RESPONSIBILITIES:
- Design and verify custom standard cells using analog design tools.
- Perform HSPICE/Spectre simulations for standard cells characterization.
- Design, develop and enhance the verification environment, including test benches for relevant EDA views (schematic/verilog/liberty views are some examples).
- Create, maintain and improve design flows and infrastructure systems.
- Benchmark 3rd party Standard Cell Libraries for performance, power, and area including through Synthesis and Place and Route.
IDEAL CANDIDATE WILL HAVE:
- Strong knowledge of CMOS integrated circuits.
- Working experience with HSPICE or Spectre and other CAD tools required for schematic/layout design.
- Experience with ASIC EDA tools used in synthesis, place and route, simulation, static timing analysis, test insertion, and formal verification.
- Experience with Hardware Description Languages such as Verilog.
- Successful development of verification test benches using ModelSim, VCS or NCSim.
- Proficient in UNIX (Linux) platforms.
ACADEMIC CREDENTIALS: BS in Electrical Engineering or equivalent.
TekWissen® Group is an equal opportunity employer supporting workforce diversity.
Senior Circuit Design Engineer in Vaughan employer: TekWissen ®
At TekWissen, we pride ourselves on being an excellent employer by fostering a collaborative and innovative work culture that empowers our employees to thrive. As a Data Management Project Manager, you will benefit from comprehensive training programs and growth opportunities, all while working in a supportive environment that values data quality and governance. Located in Canada, our team is dedicated to continuous improvement and making a meaningful impact in the field of data management.
