At a Glance
- Tasks: Lead a team in developing next-gen SERDES PHY IP solutions and collaborate across engineering disciplines.
- Company: Join Synopsys, a leader in semiconductor design and innovation.
- Benefits: Comprehensive health, wellness, and financial benefits tailored to your needs.
- Other info: Be part of a diverse team at the forefront of silicon IP innovation.
- Why this job: Drive technological innovation and mentor a world-class engineering team.
- Qualifications: 15+ years in technical development and 2+ years in people management.
The predicted salary is between 135000 - 165000 $ per year.
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are: You are a visionary technical leader with an unyielding passion for innovation in semiconductor design. With a foundation in electrical engineering and a track record of managing high-performing design teams, you excel in guiding complex digital projects from concept to commercialization. Your expertise spans synthesizable Verilog and System Verilog, and you’re adept at navigating the intricacies of front-end flows, including linting, synthesis, static timing analysis, and power optimization. You thrive in collaborative environments, working seamlessly with cross-functional teams—architecture, verification, physical implementation, and firmware—to deliver industry-leading SERDES PHY IP solutions.
What You’ll Be Doing:
- Leading a diverse team of design engineering the development of next-generation SERDES PHY IP solutions.
- Collaborating with architects, verification, physical implementation, and firmware teams to deliver comprehensive IP products.
- Planning, scheduling and driving all phases of SERDES PHY IP design, from specification through productization and customer support.
- Ensuring project success by achieving optimal timing, performance, and power goals across multiple design cycles.
- Mentoring and developing team members, fostering technical growth, and a culture of innovation.
- Engaging customers, providing support for successful IP integration into their SoCs, and addressing technical challenges.
The Impact You Will Have:
- Delivering industry-leading SERDES PHY IP solutions that set new benchmarks for speed, bandwidth, and efficiency.
- Empowering semiconductor customers to build high-performance, low-power chips for cutting-edge applications.
- Driving technical innovation that strengthens Synopsys’ leadership in the mixed-signal IP market.
- Mentoring and growing a world-class engineering team, ensuring continued excellence and market relevance.
- Enhancing product quality and reliability through rigorous design and verification processes/flows.
- Facilitating successful customer adoption and satisfaction through expert support and problem-solving.
What You’ll Need:
- Bachelor’s degree or higher in Electrical Engineering, with 15+ years of complex technical development experience.
- Minimum 2 years’ experience in people management and employee development.
- Proficiency in modeling, synthesizable Verilog and System Verilog design concepts and implementation.
- Strong background in front-end design flows: Linting, synthesis, static timing analysis (STA), CDC/RDC, DFT, and power optimization.
- Excellent communication skills and the ability to work independently and collaboratively.
- Understanding the PCIe and Ethernet standard is a plus.
Who You Are:
- Self-starter independent leader who thrives in a fast-paced, innovative setting and can drive task closure.
- Strong problem-solver with a strategic, analytical mindset.
- Inspirational leader who motivates and develops technical talent.
- Collaborative team player who excels in cross-functional environments.
- Effective communicator who can translate complex technical concepts to diverse audiences.
The Team You’ll Be A Part Of: You’ll join the Synopsys SERDES PHY IP team—a global, diverse group at the forefront of silicon IP innovation. Our team develops both digital and analog components, creating high-performance, high-bandwidth, low-latency, and low-power solutions for the world’s most advanced semiconductor technologies. We collaborate across engineering disciplines to deliver market-leading products and drive Synopsys’ leadership in chip design.
Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
ASIC Digital Design, Sr Manager in Mississauga employer: Synopsys Inc
Join a forward-thinking company that values innovation and collaboration in the semiconductor industry. As an Innovative Project Engineering Manager, you'll thrive in a dynamic work culture that encourages professional growth and offers opportunities to lead groundbreaking Silicon IP projects. Located in a tech hub, our company provides competitive benefits and a supportive environment where your expertise will drive meaningful advancements in technology.