At a Glance
- Tasks: Design and implement FPGA IP for 4G/5G radio systems using Verilog/SystemVerilog.
- Company: Stefanini Group, a leader in tech solutions, based in Ottawa.
- Benefits: Long-term contract with competitive pay and hands-on experience.
- Other info: Collaborative environment with opportunities to grow your skills.
- Why this job: Join a dynamic team and work on cutting-edge 4G/5G technology.
- Qualifications: 7+ years in FPGA design and expertise in NR/LTE protocols.
The predicted salary is between 110565 - 135135 $ per year.
Stefanini Group in Ottawa is seeking an FPGA Design Engineer with 4G/5G radio experience for an onsite, long-term contract in Kanata, Ontario, Canada.
The role requires heavy Verilog/System Verilog RTL, DSP skills, and expertise with NR/LTE protocols.
You will design FPGA IP, implement RTL, verify with UVM, and collaborate with radio and software teams.
Ideal candidates have 7+ years in FPGA design, experience with 4G/5G radios, and proficiency with Quartus, Vivado, MATLAB/Simulink.
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Senior FPGA Engineer employer: Stefanini
Stefanini Group is an exceptional employer that fosters a collaborative and innovative work culture in the heart of Kanata, Ontario. With a strong focus on employee growth, we offer continuous learning opportunities and the chance to work on cutting-edge 4G/5G technologies alongside talented professionals. Our commitment to a supportive environment ensures that every team member can thrive and contribute meaningfully to impactful projects.
