Design Verification Engineer – Vancouver

Design Verification Engineer – Vancouver

Vancouver Full-Time 114030 - 139370 $ / year (est.) On-site
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At a Glance

  • Tasks: Join our team to verify cutting-edge ASIC designs and enhance next-gen tech.
  • Company: Qualcomm, a leader in technology innovation and smart connectivity.
  • Benefits: Competitive salary, bonuses, RSU grants, and a comprehensive benefits package.
  • Other info: Dynamic work environment with opportunities for growth and accessibility support.
  • Why this job: Make an impact in the tech world while working with advanced verification methodologies.
  • Qualifications: Bachelor's degree in Engineering or related field; experience in ASIC design and verification.

The predicted salary is between 114030 - 139370 $ per year.

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency.

Qualifications

  • Bachelor's degree in Engineering, Science, or a closely related field
  • 2+ years of experience with ASIC design and verification tools, techniques, and methodology

Preferred Qualifications

  • Master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field
  • 6+ years of experience with ASIC design and verification tools, techniques, and methodology
  • 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL
  • 6+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills
  • 6+ years of experience with developing block-level testbench environment using SystemVerilog
  • 6+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
  • 6+ years of experience with scripting/automation skills using either Perl or Python
  • Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
  • Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)

Minimum Qualifications

  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
  • OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience
  • OR PhD in Science, Engineering, or related field

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accommodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Pay Range And Other Compensation & Benefits

$108,000.00 - $158,000.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

Design Verification Engineer – Vancouver employer: Qualcomm

Qualcomm Canada ULC is an exceptional employer that fosters a collaborative and innovative work culture, making it an ideal place for Display Silicon System Debug Engineers to thrive. With a strong emphasis on employee growth, you will have access to mentorship opportunities and the chance to work alongside industry leaders in a cutting-edge environment. Located in Canada, the company offers competitive benefits and a commitment to work-life balance, ensuring that you can pursue meaningful and rewarding employment while contributing to groundbreaking technology.

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Contact Details:

Qualcomm Recruitment Team

We think you need these skills to ace Design Verification Engineer – Vancouver

ASIC Design and Verification
SystemVerilog-UVM
Testbench Development
Power-Aware UPF Verification
Automation Development
Digital Design Concepts
RTL Languages (SystemVerilog, Verilog, VHDL)