Senior ASIC Physical Design Lead for SoC Tapeouts in Toronto

Senior ASIC Physical Design Lead for SoC Tapeouts in Toronto

Toronto Full-Time 135000 - 165000 $ / year (est.) On-site
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At a Glance

  • Tasks: Lead ASIC Physical Design for SoC tapeouts and collaborate with diverse engineering teams.
  • Company: Join Qualcomm Canada, a leader in cutting-edge technology and innovation.
  • Benefits: Attractive salary, health benefits, and opportunities for professional growth.
  • Other info: Dynamic work environment with excellent career advancement opportunities.
  • Why this job: Make a significant impact in the tech industry while working on advanced design projects.
  • Qualifications: Strong experience in CTS, DRC/LVS, and scripting in Python or Tcl required.

The predicted salary is between 135000 - 165000 $ per year.

Qualcomm Canada ULC is seeking a senior ASIC Physical Design engineer to lead end‑to‑end PD flows for So Cs and retimers.

You will collaborate with front‑end, analog/Ser Des, DFT, and packaging teams to drive tapeouts and ensure design convergence.

The role requires strong experience with CTS, DRC/LVS, and access to Cadence Innovus or Synopsys ICC2, plus scripting in Python or Tcl to automate flows.

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Senior ASIC Physical Design Lead for SoC Tapeouts in Toronto employer: Qualcomm

Qualcomm Canada ULC is an exceptional employer that fosters a collaborative and innovative work culture, making it an ideal place for Display Silicon System Debug Engineers to thrive. With a strong emphasis on employee growth, you will have access to mentorship opportunities and the chance to work alongside industry leaders in a cutting-edge environment. Located in Canada, the company offers competitive benefits and a commitment to work-life balance, ensuring that you can pursue meaningful and rewarding employment while contributing to groundbreaking technology.

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Contact Details:

Qualcomm Recruitment Team

We think you need these skills to ace Senior ASIC Physical Design Lead for SoC Tapeouts in Toronto

ASIC Physical Design
End-to-End PD Flows
Tapeout Management
Collaboration with Cross-Functional Teams
Clock Tree Synthesis (CTS)
Design Rule Check (DRC)
Layout Versus Schematic (LVS)