At a Glance
- Tasks: Join Qualcomm to drive the future of technology through ASIC design verification.
- Company: Qualcomm, a leading innovator in tech, shaping a smarter, connected future.
- Benefits: Competitive salary, bonuses, RSU grants, and a comprehensive benefits package.
- Other info: Dynamic work environment with opportunities for career advancement.
- Why this job: Make an impact in cutting-edge projects while growing your engineering skills.
- Qualifications: Bachelor's degree in Engineering or related field; experience with ASIC tools preferred.
The predicted salary is between 134190 - 164010 $ per year.
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency.
Qualifications
- Bachelor's degree in Engineering, Science, or a closely related field
- 2+ years of experience, with ASIC design and verification tools, techniques, and methodology
- New grad with relevant co-op, intern or PEY experience.
Preferred Qualifications
- Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field
- 6+ years of experience with ASIC design and verification tools, techniques, and methodology
- 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL.
- 6+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills.
- 6+ years of experience with developing block-level testbench environment using SystemVerilog
- 6+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
- 6+ years of experience with scripting/automation skills using either Perl or python
- Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
- Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
Minimum Qualifications
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
- OR PhD in Science, Engineering, or related field.
ASICS Design Verification Engineer – Vancouver employer: QUALCOMM, Inc.
Qualcomm Canada ULC is an exceptional employer that fosters a dynamic work culture focused on innovation and collaboration in the field of AI and machine learning. Located in a vibrant tech hub, employees benefit from competitive compensation, a comprehensive benefits package, and ample opportunities for professional growth and development. Join a team that not only values your contributions but also supports your journey in shaping the future of connected devices.
