At a Glance
- Tasks: Design and develop next-gen power control systems using cutting-edge ASIC technology.
- Company: Join Qualcomm, a leader in tech innovation and smart connectivity.
- Benefits: Competitive salary, bonuses, RSU grants, and a comprehensive benefits package.
- Other info: Dynamic work environment with opportunities for growth and learning.
- Why this job: Make an impact on the future of technology while collaborating with global teams.
- Qualifications: Bachelor's degree or higher in Engineering with relevant ASIC design experience.
The predicted salary is between 60000 - 179600 $ per year.
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Minimum Qualifications:
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Candidate will be responsible for design/developing next generation power control systems. Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, RTL design along with interactions with verification, Synthesis & PD teams for design convergence.
Responsibilities:
- Digital design and development (RTL) working in close collaboration with Multi-site leads across US and India.
- Developing the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoC.
- Design and implement defined tasks independently.
- Work in close coordination with Systems, Verification, SoC team, SW team, PD & DFT teams to get the goals completed.
- Analyze reports/waivers or run various tools: Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc.
Skills/Experience:
- 5 to 8 years of strong experience in digital front end design for ASICs.
- Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains.
- Familiar with UPF and power domain crossing.
- Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI.
- Experience in low power design methodology and clock domain crossing designs.
- Experience in Spyglass Lint/CDC checks and waiver creation.
- Experience in formal verification with Cadence LEC.
- Understanding of full RTL to GDS flow to interact with DFT and PD teams.
- Expertise in Perl, TCL language.
- Expertise in post-Si debug is a plus.
SOC Design Engineer – Markham employer: QUALCOMM, Inc.
Qualcomm Canada ULC is an exceptional employer that fosters a dynamic work culture focused on innovation and collaboration in the field of AI and machine learning. Located in a vibrant tech hub, employees benefit from competitive compensation, a comprehensive benefits package, and ample opportunities for professional growth and development. Join a team that not only values your contributions but also supports your journey in shaping the future of connected devices.
