ASIC/FPGA Design Verification Engineer, Sr Staff

ASIC/FPGA Design Verification Engineer, Sr Staff

Full-Time 134190 - 164010 $ / year (est.) On-site
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At a Glance

  • Tasks: Lead the design and verification of cutting-edge ASICs and FPGAs for next-gen technologies.
  • Company: Join Qualcomm, a leader in tech innovation shaping a smarter, connected future.
  • Benefits: Competitive salary, inclusive culture, and opportunities for professional growth.
  • Other info: Collaborative environment focused on engineering excellence and continuous improvement.
  • Why this job: Make an impact in high-speed communication and mentor the next generation of engineers.
  • Qualifications: Advanced degree in Engineering with extensive experience in ASIC/FPGA development.

The predicted salary is between 134190 - 164010 $ per year.

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

  • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

What You'll Do:

  • Deliver standards-compliant IP blocks and subsystems for PCIe Gen7 (and beyond), CXL 4.0 (and beyond), UALink, Ethernet, and next-generation high-speed interconnect ASICs and FPGAs.
  • Provide technical leadership for verification activities across IP, subsystem, and system-level designs.
  • Architect, develop, and document scalable verification environments using SystemVerilog and UVM.
  • Develop comprehensive verification test plans and drive verification closure.
  • Develop, debug, and optimize complex test cases to achieve functional and coverage goals.
  • Drive bug tracking, root-cause analysis, and issue resolution from discovery through closure.
  • Improve engineering productivity through advanced tools, AI-driven verification techniques, automation, and scripting solutions.
  • Collaborate closely with architecture, design, software, validation, and customer teams to ensure successful product execution.
  • Mentor junior and senior engineers, promoting technical excellence and verification best practices across the organization.

What You'll Need:

  • MSc/MEng with 7+ years of experience, or BSc/BEng with 10+ years of experience in ASIC or FPGA development and verification.
  • Deep knowledge of high-speed communication and interconnect protocols such as PCIe, CXL, UALink, and Ethernet.
  • Expert-level experience with SystemVerilog, UVM, constrained-random, and coverage-driven verification methodologies.
  • Strong understanding of IP, subsystem, and SoC-level verification.
  • Extensive experience with simulation, debugging, verification closure, functional coverage, and assertion-based verification.
  • Excellent technical leadership, communication, and problem-solving skills.
  • Ability to influence technical direction and drive alignment across cross-functional teams.

It'd Be Amazing If You Had:

  • Experience with PCIe Gen5/6/7 or CXL 3.0/4.0 from Physical Layer through Transaction Layer.
  • Experience with UALink and next-generation AI/HPC interconnect technologies.
  • Experience using PCIe/CXL VIPs from Siemens/Avery, Cadence, or Synopsys.
  • Experience leveraging AI-based approaches to improve verification productivity, test generation, debug, and coverage closure.
  • Experience with formal verification, emulation, or FPGA prototyping.
  • Experience defining or deploying verification methodologies used across multiple projects or teams.

About You:

  • Recognized as a technical leader who drives execution and delivers results.
  • Strong mentoring and coaching skills with a passion for developing engineers.
  • Detail-oriented with exceptional analytical and problem-solving abilities.
  • Committed to engineering excellence, quality, and continuous improvement.
  • Self-motivated, self-managing, and accountable for project outcomes.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-adcommodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

ASIC/FPGA Design Verification Engineer, Sr Staff employer: QUALCOMM, Inc.

Qualcomm Canada ULC is an exceptional employer that fosters a dynamic work culture focused on innovation and collaboration in the field of AI and machine learning. Located in a vibrant tech hub, employees benefit from competitive compensation, a comprehensive benefits package, and ample opportunities for professional growth and development. Join a team that not only values your contributions but also supports your journey in shaping the future of connected devices.

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Contact Details:

QUALCOMM, Inc. Recruitment Team

We think you need these skills to ace ASIC/FPGA Design Verification Engineer, Sr Staff

ASIC Design
FPGA Development
Verification Methodologies
SystemVerilog
UVM
High-Speed Communication Protocols
PCIe