DSP/AI Processor ASIC Design Intern in Markham

DSP/AI Processor ASIC Design Intern in Markham

Markham Internship 28.8 - 35.2 $ / hour (est.) On-site
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At a Glance

  • Tasks: Design and verify ASIC hardware for AI applications while learning from experienced engineers.
  • Company: Join Qualcomm, a leader in AI and machine learning technology.
  • Benefits: Competitive pay, housing stipend, and hands-on experience with real silicon.
  • Other info: Gain invaluable experience in a dynamic and innovative environment.
  • Why this job: Dive into cutting-edge tech and contribute to impactful AI projects.
  • Qualifications: Familiarity with HDL, SystemVerilog, C/C++, and Python is a plus.

The predicted salary is between 28.8 - 35.2 $ per hour.

Qualcomm Canada ULC invites interns for the 2027 AI & Machine Learning Hardware Engineering internships in Markham.

You will work under an experienced engineer to design, verify, and model ASIC HW IP for ML end-user applications, learning HDL-based development and verification on real silicon.

Roles cover System Verilog, System C, C/C++, Python, and UVM, with a focus on multi-phase ASIC development from spec to post-silicon.

Housing stipend and competitive pay are part of the internship package.

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DSP/AI Processor ASIC Design Intern in Markham employer: linetgroup

Qualcomm Canada ULC is an exceptional employer that fosters a collaborative and innovative work culture, particularly in the dynamic field of machine learning and AI. Located in Markham, Ontario, employees benefit from a supportive environment that encourages professional growth through hands-on experience with cutting-edge technology and cross-functional teamwork. With a focus on employee development and a commitment to pushing the boundaries of technology, Qualcomm offers a rewarding internship experience that prepares you for a successful career in engineering.

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Contact Details:

linetgroup Recruitment Team

We think you need these skills to ace DSP/AI Processor ASIC Design Intern in Markham

HDL-based Development
ASIC Design
SystemVerilog
SystemC
C/C++
Python
UVM