At a Glance
- Tasks: Design and execute custom layouts for advanced analog circuits in cutting-edge technologies.
- Company: Leading tech firm in Ottawa focused on innovative semiconductor solutions.
- Benefits: Competitive salary, career growth opportunities, and a collaborative work environment.
- Other info: Dynamic team atmosphere with exposure to world-class SoC projects.
- Why this job: Join a team working on groundbreaking 3nm/5nm technology and make an impact.
- Qualifications: 5+ years in analog layout with hands-on experience in TSMC processes.
The predicted salary is between 90000 - 110000 $ per year.
We are seeking a skilled Analog Layout Engineer with strong hands-on experience in advanced nodes (TSMC 3nm or 5nm) to join our layout design team in Canada. The ideal candidate will have a solid background in the layout of analog and mixed-signal circuits for high-performance SoCs and IPs.
Key Responsibilities
- Execute full custom layout of analog and mixed-signal blocks (e.g., op-amps, bandgaps, comparators, LDOs, PLLs, data converters)
- Participate in floorplanning, placement, routing, and optimization of analog blocks
- Drive layout closure with designers across multiple PVT corners
- Ensure compliance with DRC, LVS, ERC, and EM/IR requirements
- Collaborate with circuit designers to address layout-dependent effects (LDE), parasitic extraction (PEX), and performance-sensitive layout
- Deliver layout for TSMC 3nm/5nm technologies, meeting aggressive area, power, and performance goals
Required Skills
- 5+ years of experience in analog/mixed-signal layout
- Hands-on experience with TSMC 5nm or 3nm process nodes
- Proficient in using Cadence Virtuoso layout tools (XL/GXL)
- Strong understanding of matching, shielding, parasitics, and analog layout best practices
- Experience with PEX (Parasitic Extraction) and post-layout simulation collaboration
- Familiarity with Calibre/Assura for DRC, LVS, and physical verification
Good to Have
- Experience with EM/IR analysis tools (e.g., Voltus-Fi)
- Scripting skills (Skill, Python, or Tcl)
- Background in layout automation techniques
- Exposure to high-speed layout (SerDes, DDR, PLLs)
Why Join Us
- Opportunity to work on leading-edge 3nm/5nm analog IPs
- Collaborative work environment with exposure to world-class SoC teams
- Competitive compensation and career growth path
Senior Analog Layout Engineer in Ottawa employer: leadIC Design Pvt Ltd
Join our dynamic team in Ottawa as a Senior Analog Layout Engineer, where you'll have the opportunity to work on cutting-edge 3nm and 5nm analog IPs. We pride ourselves on fostering a collaborative work environment that encourages innovation and professional growth, offering competitive compensation and a clear career advancement path. Experience the unique advantage of being part of a world-class SoC team dedicated to excellence in high-performance design.
