At a Glance
- Tasks: Lead a team to innovate AI-driven chip design and verification processes.
- Company: Cognichip, a pioneer in AI-enabled semiconductor solutions.
- Benefits: Competitive pay, equity options, and comprehensive benefits package.
- Other info: Join a diverse team in a collaborative environment in the Greater Toronto Area.
- Why this job: Shape the future of semiconductor design with cutting-edge AI technology.
- Qualifications: 15+ years in ASIC design and team leadership, with strong technical skills.
The predicted salary is between 135000 - 165000 $ per year.
At Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through specialized generative models, agentic workflows, and seamless integration with high-performance EDA engines.
We are seeking a Senior ASIC Manager to lead a high-performing engineering team at the intersection of silicon design and artificial intelligence. In this role, you will bridge the gap between deep hardware expertise and cutting‑edge AI, managing a team focused on re‑imagining chip design flows with an AI‑first mindset.
You will be responsible for charting the path to incorporate enterprise silicon know-how into intelligent systems for AI‑native, production‑quality chip design and verification, while directly mentoring engineers and scaling our Toronto footprint.
Key Responsibilities
- Lead, mentor, and scale a highly technical team of ASIC design and verification engineers.
- Foster a collaborative environment where deep silicon expertise meets cutting‑edge AI research.
- Guide the team in identifying bottlenecks in advanced chip design processes and devising AI models, tools, and workflows to drastically improve engineering outcomes.
- Define execution and delivery, ensuring project milestones are met with production‑quality execution.
Required Qualifications
- 15+ years of experience in a mix of individual contributor roles and leading highly technical teams.
- Demonstrated experience managing engineering teams, executing performance reviews, and steering technical roadmaps.
- Extensive hands‑on experience in Digital IC, ASIC, or SoC design, with strong proficiency in SystemVerilog RTL and STA.
- Solid understanding of advanced concepts including pipelines, FIFOs, DMA engines, caches, and on‑chip interconnects, networking.
- Deep familiarity with the full design cycle (lint, CDC/RDC, functional simulation, and STA) and the ability to guide engineers through complex RTL design tradeoffs.
- Proficiency in Python and experience integrating EDA tools into automated workflows.
- Must be located in or willing to relocate to the Greater Toronto Area.
Preferred Qualifications
- Demonstrated experience with AI/ML systems, prompt engineering, context engineering, or managing teams working on AI‑assisted tool flows.
- Contributions to open‑source chip design, EDA tooling, or AI/ML infrastructure.
What We Offer
- A foundational leadership role shaping how AI transforms the semiconductor industry.
- A collaborative environment combining deep hardware expertise with generative AI innovation.
- Competitive compensation, equity, and comprehensive benefits.
We are an equal opportunity employer committed to building a diverse and inclusive team.
Senior ASIC Design Manager in Toronto employer: Cognichip
At Cognichip, we pride ourselves on being an exceptional employer that fosters innovation and collaboration in the heart of Toronto's tech scene. Our commitment to employee growth is evident through mentorship opportunities and a culture that encourages creativity at the intersection of silicon design and AI. With competitive compensation and comprehensive benefits, we empower our team to lead the charge in transforming the semiconductor industry while enjoying a supportive and inclusive work environment.
