Ciena leads in high-speed connectivity and is hiring for a mixed-signal IC design role in Ottawa. You will work on custom macros within an ASIC flow, contributing to analog-digital timing handoff and IP integration in a collaborative engineering environment.
The position requires a degree in electrical or computing engineering and hands-on experience with Cadence tools, Verilog/RTL, place-and-route, and timing analysis. Strong communication and Linux/Windows fluency are valued.
Mixed-Signal IP Integration Engineer - Flexible ASIC employer: ciena
Ciena is an exceptional employer that prioritizes innovation, collaboration, and employee well-being in the heart of Ottawa. With a strong commitment to professional growth, Ciena offers extensive development opportunities, a comprehensive benefits package, and a flexible work culture that empowers employees to thrive both personally and professionally. Join us to be part of a team that shapes the future of networking while enjoying a supportive environment that values diversity and inclusion.
