At a Glance
- Tasks: Lead the design of cutting-edge SerDes technology for next-gen AI applications.
- Company: Join a pioneering tech firm focused on high-speed interconnect solutions.
- Benefits: Competitive salary, flexible work options, and opportunities for professional growth.
- Other info: Collaborative environment with a focus on advanced technologies and career advancement.
- Why this job: Be at the forefront of innovation in high-speed technology and make a real impact.
- Qualifications: Master’s or PhD in Electrical Engineering with 10+ years in SerDes design.
We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI. Candidate will have the opportunity to architect and design SerDes for next generation transceivers.
What You Will Do
- Define architecture, specifications, and circuit topologies for next-generation SerDes
- Overview development of system-level modelling, with behavioral models (e.g., MATLAB, SystemVerilog, Verilog-A) to analyze link budgets, equalization strategies and jitter budgeting
- Design high-performance analog/mixed-signal circuits in advanced node technologies
- Develop and overview the design of critical blocks including RX/TX equalization (CTLE, DFE), High-speed PLLs, Phase interpolators, DLLs, TDCs
- Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve Power, Performance, Area
- Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts
- Overview of the analysis of Signal Integrity and Power Integrity to achieve system-defined targets
- Lead lab validation, debugging and characterization of SerDes IPs within our state-of-the-art lab
- Correlate silicon measurements with simulated data, and lead performance optimization in the system environment
What You Will Bring
- Master’s degree and/or PhD in Electrical Engineering or related fields with 10+ years of relevant experience in SerDes design
- Proven record of taking high-speed SerDes design to tape-out and volume production
- Experience in lab bring-up, characterization, and debugging designs that reach out production
- Must have extensive experience with advanced node technologies (16nm/12nm, 7nm, 5nm, 3nm, 2nm processes)
- Prior experience in cross-functional interaction to deliver IP and ensuring seamless integration in SOCs
- Strong communication and documentation skills
Principal SerDes Design Engineer employer: Celero Communications, Inc.
At Celero Communications, Inc., we pride ourselves on fostering a dynamic and innovative work culture that empowers our employees to excel in their roles. As a Senior High-Speed Analog IC Designer, you will have access to cutting-edge technology and the opportunity for professional growth within a collaborative team environment. Located in a vibrant startup atmosphere, we offer competitive benefits and a chance to make a significant impact in the rapidly evolving field of AI interconnects.
Contact Details:
Celero Communications, Inc. Recruitment Team
