At a Glance
- Tasks: Design cutting-edge high-speed mixed-signal silicon and collaborate with top-notch teams.
- Company: Join Capgemini, a global leader in tech transformation and innovation.
- Benefits: Enjoy competitive salary, comprehensive benefits, and flexible work options.
- Other info: Be part of a diverse community committed to sustainability and inclusion.
- Why this job: Make a real impact on next-gen technologies while shaping your career.
- Qualifications: 6+ years in Analog/RF IC layout with advanced FinFET tech experience.
The predicted salary is between 88800 - 187740 $ per year.
Choosing Capgemini means choosing a company where you will be empowered to shape your career in the way you’d like, where you’ll be supported and inspired by a collaborative community of colleagues around the world, and where you’ll be able to reimagine what’s possible. Join us and help the world’s leading organizations unlock the value of technology and build a more sustainable, more inclusive world.
As a Senior Analog / RF IC Layout Engineer, you will play a critical role in designing and enabling cutting‑edge high‑speed mixed‑signal silicon for next‑generation technologies. You will collaborate with world‑class design, verification, and process teams to deliver robust, scalable layouts in advanced FinFET nodes that power high‑performance products across industries.
Your role
- Lead and contribute to the physical layout of complex, high‑speed analog and RF mixed‑signal blocks from concept through tape‑out.
- Develop and implement block‑level and chip‑level layouts in advanced CMOS FinFET technologies (7nm and below).
- Partner closely with analog, RF, and digital designers to ensure layout quality, performance, and manufacturability.
- Own floor planning, block‑level routing, and top‑level chip assembly activities for complex integrated circuits.
- Apply best‑in‑class layout techniques to address signal integrity, electromigration, thermal awareness, and high‑speed performance.
- Drive layout reviews, layout verification, and design rule compliance using industry‑standard EDA tools.
- Mentor and guide junior engineers while promoting quality, collaboration, and engineering best practices.
Your skills and experience
- 6+ years of experience in Analog and RF IC layout for high‑speed applications.
- Hands‑on experience developing and leading complex layouts at both block and full‑chip levels in advanced FinFET technologies (7nm and below).
- Strong expertise using industry‑standard EDA tools from Cadence, Mentor, and Synopsys.
- Proven experience with layout of high‑performance analog mixed‑signal blocks, such as:
- High‑speed transceivers
- CMOS drivers
- High‑speed data converters
- PLLs
- Solid understanding of floor planning, routing, layer generation, thermal‑aware layout practices, and electromigration considerations.
Senior Analog Layout Engineer in Toronto employer: Capgemini Engineering
Capgemini Engineering in Toronto is an exceptional employer that fosters a collaborative and innovative work culture, making it an ideal place for a Senior Utility Project Manager. With a strong focus on employee growth and development, the company offers numerous opportunities for professional advancement while supporting a healthy work-life balance through its hybrid work model. Employees benefit from engaging projects in the utility sector, allowing them to make a meaningful impact while building lasting client relationships.
