2 days ago Be among the first 25 applicants
This range is provided by Arcadia. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range
CA$150,000.00/yr - CA$200,000.00/yr
Location: Hybrid – Downtown Toronto (4 days/week in office, near Union Station)
Type: Full-time | Permanent
Compensation: $150K–$200K CAD base + early-stage equity
A well-funded AI + semiconductor startup ($30M+ raised) is hiring a junior/intermediate Design Verification Engineer to help reinvent chip verification through AI-native tooling and intelligent automation.
This is a rare chance to get in early, work alongside senior silicon engineers and ML researchers, and build your career on greenfield verification flows that combine traditional SystemVerilog/UVM with cutting-edge AI-driven design tools.
What You’ll Do
- Write and run SystemVerilog/UVM testbenches to validate RTL blocks.
- Develop directed and constrained-random tests for functional coverage.
- Work with senior DV/RTL engineers to define verification plans and metrics.
- Automate test execution, regressions, and coverage collection with Python/scripting.
- Contribute to experiments in AI-assisted verification workflows.
What We’re Looking For
- 1–5 years in ASIC/FPGA verification or chip design internships/projects.
- Familiarity with SystemVerilog, UVM, or similar verification methodologies.
- Strong scripting skills (Python, TCL, or Shell) for automation.
- Solid fundamentals in digital design, RTL, and computer architecture.
- Eager to learn and thrive in a fast-paced startup with strong mentorship.
- Hands-on coursework or internships with EDA tools (VCS, Questa, Xcelium, etc.).
- Exposure to open-source verification frameworks (CocoTB, Verilator).
- Knowledge of on-chip protocols (AXI, SPI, PCIe, DDR).
- Coursework or curiosity around AI/ML in chip design.
Jumpstart your career in AI-powered chip verification
Competitive salary + meaningful equity in a well-funded, deeply technical startup
Learn directly from senior silicon + AI engineers pushing the frontier
Hybrid role in Toronto — high-trust, low-ego team, chance to grow fast
#J-18808-Ljbffr
Sr. Design Verification Engineer in Toronto employer: Arcadia
Join a dynamic AI innovation startup located in downtown Toronto, where you'll have the opportunity to take ownership of cutting-edge architecture and technical direction for large-scale AI platforms. With a hybrid work model, a culture that fosters autonomy, and access to extensive resources from a global technology leader, this role offers meaningful challenges and significant growth opportunities in a collaborative environment. You'll be part of a team that values hands-on problem-solving and mentorship, making it an excellent place for passionate engineers looking to make a real impact.
