Silicon Design Engineer - Technical Lead in Markham

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

This role is an excellent opportunity to work on the cutting-edge next generation technologies that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. You will join one of the fastest-growing fields of Chiplet Interconnect technology rapidly being adopted across the VLSI industry. The team works on supporting both AMD proprietary I/O protocols and is also a key driver for industry standard Universal Chiplet Interconnect Express (UCIe) and Ultra Accelerator Link (UALink). The IP portfolio caters to short/ultra-short reach die-2-die interconnect with different bounding boxes tied to beachfront, Power, BER requirements. As a member of this team, you get a chance to work on IP development, drive design-specification, work on digital design and collaborate in the whole spectrum of areas including DFT, Firmware, Design verification, and Physical Design.

The Person thrives in a collaborative, team-oriented environment that fosters continuous learning and professional growth. Demonstrates strong analytical and problem-solving capabilities, with exceptional attention to detail and a passion for learning new design methodologies and implementation techniques. Possesses excellent interpersonal and communication skills, with the ability to collaborate effectively across teams and influence stakeholders. Exhibits strong leadership potential and a proactive approach to driving results.

Key Responsibilities

• Experience with I/O protocols like USB, PCIe, CXL.
• Experience in developing micro-architecture for any given module.
• RTL design experience with multi-clock, high frequency designs, low latency, low power & high performance.
• Debugging/Post Silicon Bring up.
• Good Documentation and presentation skills.
• Micro-architecture of simple to complex digital blocks.
• RTL development using best industry practices.
• Optimize design for key metrics like Area, Power, Performance etc.
• Ability to work with cross-functional teams like DFT, Implementation, Verification, Emulation, Firmware regularly.

Preferred Experience

• Experience in digital front-end implementation, including micro-architecture definition.
• Experience with scripting/automation languages like Python/Perl.
• Firmware on Hardware-Firmware co-design.
• Experience with state-of-the-art industry standard digital tools.
• Preferred experience in design with multiple clock domains.
• RTL design experience with multi-clock, high frequency designs.
• Knowledge in digital RTL Digital Design and Implementation.
• Experience with Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA).

Academic Credentials

Master’s/Bachelor’s in electrical engineering or equivalent preferred.

Location: Markham, ON

Benefits offered are described: AMD benefits at a glance.