Altera in Toronto, Ontario, is seeking an FPGA Compiler Engineer (Placer) to join our Compiler team. You will design and optimize placement algorithms to improve QoR for large FPGA designs and contribute to the end-to-end FPGA compilation flow.
The role requires strong EDA algorithm experience, large-scale optimization, and related FPGA/ASIC flows. Collaboration with routing, timing, and architecture teams is essential, and candidates should have C/C++ skills and hands-on toolchain experience.
#J-18808-Ljbffr
Senior FPGA Compiler & Placement Engineer in Toronto employer: altera
Altera is an exceptional employer located in the vibrant city of Toronto, offering a dynamic work culture that fosters innovation and collaboration. As a HLS Compiler Engineer, you will benefit from mentorship by seasoned professionals while engaging in meaningful projects that push the boundaries of technology. With a strong focus on employee growth and development, Altera provides unique opportunities to enhance your skills in a cutting-edge field, making it an ideal place for those seeking a rewarding career in hardware synthesis and AI acceleration.
