PCIe IP ASIC Design Engineer in Markham

PCIe IP ASIC Design Engineer in Markham

Markham Full-Time 135000 - 165000 $ / year (est.) On-site
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At a Glance

  • Tasks: Design cutting-edge PCIe solutions and optimize ASIC development.
  • Company: Join AMD, a leader in innovative technology.
  • Benefits: Competitive salary, health benefits, and opportunities for growth.
  • Other info: Collaborative environment with exciting projects and career advancement.
  • Why this job: Make an impact in the tech world with your design expertise.
  • Qualifications: Experience in ASIC design and strong Verilog HDL skills required.

The predicted salary is between 135000 - 165000 $ per year.

Design AMD PCIe solutions through RTL implementation and front-to-back flows, contributing to power-efficient, performance-optimized ASIC development. As an ASIC Design Engineer focused on PCIe IP Enablement, you will support architecture, IP design, RTL implementation, and SoC deployment. The work requires digital design expertise, Verilog HDL, and end-to-end ownership of complex digital IP or subsystems. You will collaborate across IP design, Physical Design, and SoC teams.

Key Responsibilities:

  • Integrate AMD PCI Express subsystems and deploy IP to SoCs
  • Complete synthesis, timing, lint, and CDC closure
  • Implement test, debug, and clock-related design elements
  • Apply UPF-based power-aware design flows and checks
  • Develop automation, scripting, and design flows hands-on

Requirements:

  • ASIC hardware design experience with end-to-end ownership
  • Strong digital RTL design and Verilog HDL knowledge
  • Experience with synthesis, lint, CDC, equivalence, and STA
  • Knowledge of low-power techniques and UPF or CPF flows
  • Bachelor's or Master's degree in Electrical or Computer Engineering preferred

Bring PCIe integration, RTL quality, power-aware design, and technical problem-solving expertise to AMD ASIC development.

PCIe IP ASIC Design Engineer in Markham employer: Advanced Micro Devices, Inc.

At AMD, we pride ourselves on fostering a dynamic work culture that encourages innovation and collaboration. As a Low Power Signoff Lead Engineer, you will benefit from our commitment to employee growth through continuous learning opportunities and mentorship, all while working in a vibrant location that promotes a healthy work-life balance. Join us to be part of a team that values your contributions and empowers you to make a significant impact in the world of technology.

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Contact Details:

Advanced Micro Devices, Inc. Recruitment Team

We think you need these skills to ace PCIe IP ASIC Design Engineer in Markham

RTL Implementation
Verilog HDL
Digital Design Expertise
ASIC Hardware Design
Synthesis
Linting
CDC Closure