Senior Mixed-Signal Designer – Hybrid

This is a hybrid role that can be performed three days per week from our Ottawa office.

Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborative environment in order to ensure success and personal growth.

As a key member of the mixed-signal design team, you will be part of a dynamic small group developing high-speed (> 25 Gb/s) and high-precision analog designs for optical communication products. You will be responsible for the architecture, design, layout, measurement, and commercialization of ultra-deep submicron CMOS products. You will lead efforts on a significant block of a complex chip, mentor team members, track deliverables, participate in peer reviews of complex IC designs, and provide a solid design methodology from conception to production. You will also collaborate with the packaging and hardware design team to ensure signal integrity and power specifications are met.

You have a passion for developing high-speed AMS circuits and cutting-edge products that push the limits of what is possible. You are detail-oriented, energetic, and driven to make progress and solve challenging problems. You can find solutions independently but also engage in our friendly, collaborative, team-oriented approach, meaning you enjoy learning from your colleagues and enabling them to learn from you. You are not hesitant to suggest ways we can be more efficient as a team and are open to similar suggestions from your team members.

Minimum Qualifications:

• Bachelor's degree and 12 years of relevant experience, or Master's degree and 6 years of relevant experience, or PhD and at least 3 years of relevant experience.
• Prior experience in the design, simulation, and measurement of high-speed integrated circuits in at least three of the following areas: SerDes/serial links, output driver circuits, phase-locked loops (PLL), clock distribution, operational amplifiers/PGA, or equalization techniques.

Preferred Qualifications:

• Experience in electrical transceiver applications, including backplane and cable communications.
• Experience with FinFET and GAA technologies.
• Experience with high-frequency ground planes, including layout (power and ground, routing of digital and analog signals), passive components (inductors, transformers, and transmission lines).
• Experience in manufacturability-focused design, including characterization under PVT variations, electromigration analysis, self-heating, and IR drop.
• Experience in laboratory validation, including ESD practices and methodology and building test setups.
• Experience with design software, including Cadence (Virtuoso), Spectre/APS/SpectreX, layout validation tools (Virtuoso and Calibre), EMX, mixed-signal simulations in AMS, and Matlab.

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions.